A flash memory cell can be a field effect transistor (FET) that includes a select gate, a floating gate, a drain, and a source. A cell can be read by grounding the source, and applying a voltage to a bitline connected with the drain. By applying a voltage to the wordline connected to the select gate, the cell can be switched on and off.
Programming a cell includes trapping excess electrons in the floating gate to increase voltage. This reduces the current conducted by the memory cell when the select voltage is applied to the select gate. The cell is programmed when the cell current is less than a reference current when the select voltage is applied. The cell is erased when the cell current is greater than the reference current and the select voltage is applied.
Memory cells with only two programmable states contain only a single bit of information, such as a xe2x80x9c0xe2x80x9d or a xe2x80x9c1xe2x80x9d. A multi-level cell (xe2x80x9cMLCxe2x80x9d) is a cell that can be programmed with more than one voltage level. Each voltage level is mapped to corresponding bits of information. For example, a single multilevel cell can be programmed with one of four voltage levels, e.g. xe2x88x922.5V, 0.0V, +1.0V, +2.0V that correspond to binary bits xe2x80x9c00xe2x80x9d, xe2x80x9c01xe2x80x9d, xe2x80x9c10xe2x80x9d, and xe2x80x9c11xe2x80x9d, respectively. A cell that is programmable at more voltage levels can store more bits of data based on Eqn. 1.
N=2{circumflex over ( )}Bxe2x80x83xe2x80x83Eqn.1
B is the number of bits of data stored
N is the number of voltage levels.
Thus, a 1 bit cell requires 2 voltage levels, a 2 bit cell requires 4 voltage levels, a 3 bit cell requires 8 voltage levels, and a 4 bit cell requires 16 voltage levels.
FIG. 1 shows a representation of a four level multilevel cell program voltage diagram 100. The program voltage distribution (xe2x80x9cdistributionxe2x80x9d) of the four levels are shown between lines 102 and 104, 106 and 108, lines 110 and 112, and above line 114, respectively. The programming distribution can be for example 100 mV to 600 mV wide. A four level multilevel memory cell can be programmed with any one of these voltage levels. Because the cell can store one of four binary values it can store 2 bits of information. The data margin (xe2x80x9cmarginxe2x80x9d), also called a guard band, is the voltage levels between distributions that is not normally used. The margins are shown in FIG. 1 between lines 104 and 106; lines 108 and 110; and lines 112 and 114. For example, the data margin can be 800 mV to 100 mV wide.
Memory cell programming time can be reduced by using a longer initial pulse followed by regular length pulses as needed. Since memory cell programming pulses have raise and fall times, when the voltage applied is less than the programming voltage, and each programming pulse requires a program verify, which increases the programming overhead, replacing the first few regular pulses with a single longer pulse reduces the programming overhead.